5.2 Exception Processing Registers

Exception Program Counter (EPC) Register (14)


The Exception Program Counter (EPC) is a read/write register that contains the address at which processing resumes after an exception has been serviced.

For synchronous exceptions, the EPC register contains either:

The processor does not write to the EPC register when the
EXL bit in the Status register is set to a 1.

Figure 5-8 shows the format of the EPC register.



Figure 5-8 EPC Register Format



Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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