4.2 Address Spaces

Kernel Mode Operations


The processor operates in Kernel mode when the Status register contains one of the following values:

In conjunction with these bits, the KX bit in the Status register selects between 32- or 64-bit Kernel mode addressing:

The processor enters Kernel mode whenever an exception is detected and it remains in Kernel mode until an Exception Return (ERET) instruction is executed. The ERET instruction restores the processor to the mode existing prior to the exception.

Kernel mode virtual address space is divided into regions differentiated by the high-order bits of the virtual address, as shown in Figure 4-6. Table 4-3 lists the characteristics of the 32-bit kernel mode segments, and Table 4-4 lists the characteristics of the 64-bit kernel mode segments.



Figure 4-6 Kernel Mode Address Space


*NOTE: The R4000 uses 64-bit addresses internally. In 32-bit mode, a valid address must be a 32-bit signed number, where bits 63:32 = bit 31; an invalid address produces an undefined result. In 32-bit mode, a Kernel-mode program may use 64-bit instructions, but must not create addresses using base register+offset calculations that produce a 32-bit 2's-complement overflow; in specific, there are two prohibited cases:


Table 4-3
32-bit Kernel Mode Segments

32-bit Kernel Mode, User Space (kuseg)

In Kernel mode, when KX = 0 in the Status register, and the most-significant bit of the virtual address, A31, is cleared, the 32-bit kuseg virtual address space is selected; it covers the full 231 bytes (2 Gbytes) of the current user address space. The virtual address is extended with the contents of the 8-bit ASID field to form a unique virtual address.

When ERL = 1 in the Status register, the user address region becomes a
231-byte unmapped (that is, mapped directly to physical addresses) uncached address space. See the Cache Error exception in Chapter 5
for more information.

32-bit Kernel Mode, Kernel Space 0 (kseg0)

In Kernel mode, when KX = 0 in the Status register and the most-significant three bits of the virtual address are 1002, 32-bit kseg0 virtual address space is selected; it is the 229-byte (512-Mbyte) kernel physical space. References to kseg0 are not mapped through the TLB; the physical address selected is defined by subtracting 0x8000 0000 from the virtual address. The K0 field of the Config register, described in this chapter, controls cacheability and coherency.

32-bit Kernel Mode, Kernel Space 1 (kseg1)

In Kernel mode, when KX = 0 in the Status register and the most-significant three bits of the 32-bit virtual address are 1012, 32-bit kseg1 virtual address space is selected; it is the 229-byte (512-Mbyte) kernel physical space.

References to kseg1 are not mapped through the TLB; the physical address selected is defined by subtracting 0xA000 0000 from the virtual address.

Caches are disabled for accesses to these addresses, and physical memory (or memory-mapped I/O device registers) are accessed directly.

32-bit Kernel Mode, Supervisor Space (ksseg)

In Kernel mode, when KX = 0 in the Status register and the most-significant three bits of the 32-bit virtual address are 1102, the ksseg virtual address space is selected; it is the current 229-byte (512-Mbyte) supervisor virtual space. The virtual address is extended with the contents of the 8-bit ASID field to form a unique virtual address.

32-bit Kernel Mode, Kernel Space 3 (kseg3)

In Kernel mode, when KX = 0 in the Status register and the most-significant three bits of the 32-bit virtual address are 1112, the kseg3 virtual address space is selected; it is the current 229-byte (512-Mbyte) kernel virtual space. The virtual address is extended with the contents of the 8-bit ASID field to form a unique virtual address.

Table 4-4 64-bit Kernel Mode Segments

64-bit Kernel Mode, User Space (xkuseg)

In Kernel mode, when KX = 1 in the Status register and bits 63:62 of the 64-bit virtual address are 002, the xkuseg virtual address space is selected; it covers the current user address space. The virtual address is extended with the contents of the 8-bit ASID field to form a unique virtual address.

When ERL = 1 in the Status register, the user address region becomes a 231-byte unmapped (that is, mapped directly to physical addresses) uncached address space. See the Cache Error exception in Chapter 5 for more information.

64-bit Kernel Mode, Current Supervisor Space (xksseg)

In Kernel mode, when KX = 1 in the Status register and bits 63:62 of the 64-bit virtual address are 012, the xksseg virtual address space is selected; it is the current supervisor virtual space. The virtual address is extended with the contents of the 8-bit ASID field to form a unique virtual address.

64-bit Kernel Mode, Physical Spaces (xkphys)

In Kernel mode, when KX = 1 in the Status register and bits 63:62 of the 64-bit virtual address are 102, the xkphys virtual address space is selected; it is a set of eight 236-byte kernel physical spaces. Accesses with address bits 58:36 not equal to 0 cause an address error.

References to this space are not mapped; the physical address selected is taken from bits 35:0 of the virtual address. Bits 61:59 of the virtual address specify the cacheability and coherency attributes, as shown in Table 4-5.

Table 4-5 Cacheability and Coherency Attributes

64-bit Kernel Mode, Kernel Space (xkseg)

In Kernel mode, when KX = 1 in the Status register and bits 63:62 of the 64-bit virtual address are 112, the address space selected is one of the following:

64-bit Kernel Mode, Compatibility Spaces (ckseg1:0, cksseg, ckseg3)

In Kernel mode, when KX = 1 in the Status register, bits 63:62 of the 64-bit virtual address are 112, and bits 61:31 of the virtual address equal -1, the lower two bytes of address, as shown in
Figure 4-6, select one of the following 512-Mbyte compatibility spaces.



Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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