- User Mode Operations

4.2 Address Spaces

User Mode Operations

In User mode, a single, uniform virtual address space--labelled User segment--is available; its size is:

2 Gbytes (231 bytes) in 32-bit mode (useg)
1 Tbyte (240 bytes) in 64-bit mode (xuseg)

Figure 4-4 shows User mode virtual address space.

Figure 4-4 User Mode Virtual Address Space

*NOTE: The R4000 uses 64-bit addresses internally. When the kernel is running in Kernel mode, it initializes registers before switching modes, and saves (or restores, whichever is appropriate) register values on context switches. In 32-bit mode, a valid address must be a 32-bit signed number, where bits 63:32 = bit 31. In normal operation it is not possible for a 32-bit User-mode program to produce invalid addresses. However, although it would be an error, it is possible for a Kernel-mode program to erroneously place a value that is not a 32-bit signed number into a 64-bit register, in which case the User-mode program generates an invalid address.

The User segment starts at address 0 and the current active user process resides in either useg (in 32-bit mode) or xuseg (in 64-bit mode). The TLB identically maps all references to useg/xuseg from all modes, and controls cache accessibility.*1

The processor operates in User mode when the Status register contains the following bit-values:

KSU bits = 102
EXL = 0
ERL = 0

In conjunction with these bits, the UX bit in the Status register selects between 32- or 64-bit User mode addressing as follows:

when UX = 0, 32-bit useg space is selected and TLB misses are handled by the 32-bit TLB refill exception handler
when UX = 1, 64-bit xuseg space is selected and TLB misses are handled by the 64-bit XTLB refill exception handler

Table 4-1 lists the characteristics of the two user mode segments, useg and xuseg.

Table 4-1 32-bit and 64-bit User Mode Segments

32-bit User Mode (useg)

In User mode, when UX = 0 in the Status register, User mode addressing is compatible with the 32-bit addressing model shown in Figure 4-4, and a 2-Gbyte user address space is available, labelled useg.

All valid User mode virtual addresses have their most-significant bit cleared to 0; any attempt to reference an address with the most-significant bit set while in User mode causes an Address Error exception.

The system maps all references to useg through the TLB, and bit settings within the TLB entry for the page determine the cacheability of a reference.

64-bit User Mode (xuseg)

In User mode, when UX =1 in the Status register, User mode addressing is extended to the 64-bit model shown in Figure 4-4. In 64-bit User mode, the processor provides a single, uniform address space of 240 bytes, labelled xuseg.

All valid User mode virtual addresses have bits 63:40 equal to 0; an attempt to reference an address with bits 63:40 not equal to 0 causes an Address Error exception.

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