
4.2 Address Spaces

Figure 4-1 Overview of a Virtual-to-Physical Address Translation
As shown in Figures 4-2 and 4-3, the virtual address is extended with an 8-bit address space identifier (ASID), which reduces the frequency of TLB flushing when switching contexts. This 8-bit ASID is in the CP0 EntryHi register, described later in this chapter. The Global bit (G) is in the EntryLo0 and EntryLo1 registers, described later in this chapter.





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