FPU Instruction Opcode Bit Encoding
Figure B-3 Bit Encoding for FPU Instructions
Figure B-3 (cont.) Bit Encoding for FPU Instructions
Key:
- g (gamma) Operation codes marked with a gamma cause a reserved instruction exception. They are reserved for future versions of the architecture.
- d (delta ) Operation codes marked with a delta cause unimplemented operation exceptions in all current implementations and are reserved for future versions of the architecture.
- h (eta) Operation codes marked with an eta are valid only when MIPS III instructions are enabled. Any attempt to execute these without MIPS III instructions enabled causes an unimplemented operation exception.
Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96
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