A CPU Instruction Set Details



Format:

TLTIU rs, immediate

Description:

The 16-bit immediate is sign-extended and compared to the contents of general register rs. Considering both quantities as signed integers, if the contents of general register rs are less than the sign-extended immediate, a trap exception occurs.

Operation:

Exceptions:

Trap exception

Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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