A CPU Instruction Set Details



Format:

MFHI rd

Description:

The contents of special register HI are loaded into general register rd.

To ensure proper operation in the event of interruptions, the two instructions which follow a MFHI instruction may not be any of the instructions which modify the HI register: MULT, MULTU, DIV, DIVU, MTHI, DMULT, DMULTU, DDIV, DDIVU.

Operation:

Exceptions:

None

Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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