A CPU Instruction Set Details

ERET

Description:

ERET is the R4000 instruction for returning from an interrupt, exception, or error trap. Unlike a branch or jump instruction, ERET does not execute the next instruction.

ERET must not itself be placed in a branch delay slot.

If the processor is servicing an error trap (SR2 = 1), then load the PC from the ErrorEPC and clear the ERL bit of the Status register (SR2). Otherwise (SR2 = 0), load the PC from the EPC, and clear the EXL bit of the Status register (SR1).

An ERET executed between a LL and SC also causes the SC to fail.

Operation:

Exceptions:

Coprocessor unusable exception

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