A CPU Instruction Set Details



Format:

DADDU rd, rs, rt

Description:

The contents of general register rs and the contents of general register rt are added to form the result. The result is placed into general register rd.

No overflow exception occurs under any circumstances.

The only difference between this instruction and the DADD instruction is that DADDU never causes an overflow exception.

This operation is only defined for the R4000 operating in 64-bit mode. Execution of this instruction in 32-bit mode causes a reserved instruction exception.

Operation:

Exceptions:

Reserved instruction exception (R4000 in 32-bit mode)

Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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