A CPU Instruction Set Details



Format:

CTCz rt, rd

Description:

The contents of general register rt are loaded into control register rd of coprocessor unit z.

This instruction is not valid for CP0.

Operation:

Exceptions:

Coprocessor unusable

*See "CPU Instruction Opcode Bit Encoding" at the end of Appendix A.

Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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