A CPU Instruction Set Details



Format:

CFCz rt, rd

Description:

The contents of coprocessor control register rd of coprocessor unit z are loaded into general register rt.

This instruction is not valid for CP0.

Operation:

Exceptions:

Coprocessor unusable exception

*Opcode Bit Encoding:

Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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