A CPU Instruction Set Details
A.6 Coprocessor Instructions
Coprocessors are alternate execution units, which have register files separate from the CPU. The MIPS architecture provides four coprocessor units, or classes, and these coprocessors have two register spaces, each space containing thirty-two 32-bit registers.
- The first space, coprocessor general registers, may be directly loaded from memory and stored into memory, and their contents may be transferred between the coprocessor and processor.
- The second space, coprocessor control registers, may only have their contents transferred directly between the coprocessor and the processor. Coprocessor instructions may alter registers in either space.
Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96
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