R4400 Microprocessor User's Manual


A CPU Instruction Set Details


This appendix provides a detailed description of the operation of each R4000 instruction in both 32- and 64-bit modes. The instructions are listed in alphabetical order.

Exceptions that may occur due to the execution of each instruction are listed after the description of each instruction. Descriptions of the immediate cause and manner of handling exceptions are omitted from the instruction descriptions in this appendix.

Figures at the end of this appendix list the bit encoding for the constant fields of each instruction, and the bit encoding for each individual instruction is included with that instruction.


Chapter Contents

A.1 - Instruction Classes
A.2 - Instruction Formats
A.3 - Instruction Notation Conventions
A.4 - Load and Store Instructions
A.5 - Jump and Branch Instructions
A.6 - Coprocessor Instructions
A.7 - System Control Coprocessor (CP0) Instructions
Format:


Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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