16.2 R4400 Master/Checker Mode

Reset Operation


When the R4400 processor is a Complete Listener, SIMaster, or SCMaster, an assertion of Reset* after the initial boot sequence is significant.

If Reset* is asserted a second time and subsequently deasserted, the R4400 processor changes to Forced Complete Master mode and drives all outputs.

If Reset* is asserted and deasserted a third time, the R4400 processor returns to its prior mode, as programmed by the boot-mode bits.

On any subsequent assertion and deassertion of Reset*, the processor alternates between the two modes described above: the mode determined by boot-time mode bits if the Master/Checker mode is Complete Listener, SIMaster, or SCMaster, or Forced Complete Master mode.

In Forced Complete Master mode, the Fault* pin reports all output faults, not just faults of the System interface as are reported in Complete Master mode.



Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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