16.2 R4400 Master/Checker Mode
Master-Listener Configuration
As shown in Figure 16-5, the Master-Listener lock step configuration pairs a Complete Master (mode bits 42 and 18 = 002) with a Complete Listener (mode bits 42 and 18 = 112). In this configuration, the Complete Listener has disabled output drivers; otherwise, the two R4400 processors operate identically, both receiving the same inputs. On all output cycles, the Complete Listener compares data on the output and I/O buses with expected data, and asserts the Fault* signal in the event of a miscomparison.
Figure 16-5 Master-Listener Configuration of Master/Checker Mode
Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96
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