-ECC Check Bits

16.1 Error Checking in the Processor

ECC Check Bits

The R4000 processor provides the following check bits: 16 check bits, SCDChk(15:0), are used for the secondary cache data bus; 7 check bits, SCTChk(6:0), are used for the secondary cache tag bus; 8 check bits, SysADC(7:0), are used for the System interface address and data bus; a single parity bit, SysCmdP, is used for the System interface command bus.

In the R4400 processor, the Fault* pin reports data parity or any ECC errors received from the System interface during an external update or an external write. The Fault* pin also reports errors among the address bits received from the System interface. In each case, the full 64-bit data and 8-bit ECC are significant. This checking is not affected by the state of the disable bit [SysCmd(4)] in the data identifier. No exceptions are generated for these checks.

Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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