13.5 -SCTAG Bus

13. Secondary Cache Interface

13.5 SCTAG Bus

The secondary cache tag bus, SCTag, is divided into three fields, as shown in Figure 13-1. The CS field indicates the cache state: invalid, clean exclusive, dirty exclusive, shared, or dirty shared. The PIdx field is an index to the virtual address of primary cache lines that can contain data from the secondary cache. Bits 18:0 contain the upper physical address.

Figure 13-1 SCTag Fields

The SCDCS* and SCTCS* signals disable reads or writes of either the data array or tag array when the opposite array is being accessed. These signals are useful for saving power on snoop and invalidate requests since access to the data array is not necessary. These signals also write data from the primary data cache to the secondary cache.

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