12. System Interface
12.11 Processor Internal Address Map
External reads and writes provide access to processor internal resources that may be of interest to an external agent. The processor decodes bits SysAD(6:4) of the address associated with an external read or write request to determine which processor internal resource is the target. However, the processor does not contain any resources that are readable through an external read request. Therefore, in response to an external read request the processor returns undefined data and a data identifier with its Erroneous Data bit, SysCmd(5), set. The Interrupt register is the only processor internal resource available for write access by an external request. The Interrupt register is accessed by an external write request with an address of 0002 on bits 6:4 of the SysAD bus.
Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96
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