The processor then executes one of the following requests:

• If the coherency attribute is either sharable or exclusive, a write invalidate protocol is in effect, and a coherent block read that requests exclusivity is issued.
• If the coherency attribute is update, a write update protocol is in effect and a coherent block read request is issued.
• If the coherency attribute is noncoherent, a noncoherent block read request is issued.

If the current cache line does not need to be written back and the coherency attribute for the page that contains the requested cache line is noncoherent, the processor issues a noncoherent block read request for the cache line that contains the store target location.

If the current cache line does not need to be written back and the coherency attribute for the page that contains the requested cache line is sharable or exclusive, the processor issues a coherent block read request that also requests exclusivity.

If the current cache line does not need to be written back, the coherency attribute for the page that contains the requested cache line is update, and potential updates are enabled, the processor issues a cluster consisting of a read request, followed by a potential update request.

In an update protocol, the cache line requested by a processor coherent read request can be returned in a shared state; the processor then has to issue an update request before it can complete a store instruction. A potential update issued with a read request in a cluster allows the external agent to anticipate the read response on the system bus. If the read response is in a shared state, the required update is quickly transmitted to the rest of the system. This provides the processor with the acknowledge and allows the processor to complete the store instruction as rapidly as possible.

Without the potential update request, the response data must be returned to the processor. If the line is returned in the shared or dirty shared state, the processor issues an update request, which must then be forwarded to the system bus before an acknowledge can be returned to the processor.

Note that potential updates behave as if they have not yet been issued by the processor. Potential updates are not subject to cancellation, and do not require an acknowledge. When a potential update is nullified, the processor behaves as if no update request was ever issued; when a potential update becomes compulsory, the processor behaves as if it had issued an update request at that instant.

Compulsory Update: If the processor issues a cluster that contains a potential update, and the response data for the read request is returned with an indication that it must be placed in the cache in either a shared or dirty shared state, the potential update then becomes compulsory. Once a potential update becomes compulsory, it is subject to cancellation, and the processor requires an acknowledge for the update request. The external agent must forward the update to the system, then signal the acknowledge to the processor when the update is complete. The processor will not complete the store until it has received an acknowledge for the update request.

Nullifying a Potential Update: If the processor issues a cluster that contains a potential update, and the response data for the read request is returned in either a clean exclusive or dirty exclusive state, the potential update is nullified. Once a potential update has been nullified, the external agent must discard the update. The processor does not wait for or expect an acknowledge to a potential update that has been nullified. It is not correct to assert either IvdAck* or IvdErr* in this situation.

If the read response data is returned in either the clean exclusive or dirty exclusive state, the processor cannot issue an update request. It is assumed that the external agent will take the appropriate action to change the state of the cache line to invalid in other caches.

In no-secondary-cache mode, if the new cache line replaces a current cache line whose Write back (W) bit is set, the current cache line moves to an internal write buffer before the new cache line is loaded in the primary cache.