12.4 Processor and External Requests

External Requests


External
requests include read, write, invalidate, update, snoop, intervention, and null requests, as shown in Figure 12-11. External invalidate, update, snoop and intervention requests, as a group, are referred to as external coherence requests. This section also includes a description of read response, a special case of an external request.



Figure 12-11 External Requests

Read request asks for a word of data from the processor's internal resource.

Write request provides a word of data to be written to the processor's internal resource.

Invalidate request specifies a cache line, in the primary and secondary caches of the processor, that must be marked invalid.

Update request provides a doubleword, partial doubleword, word, or partial word of data to be written to the processor's primary and secondary caches.

Snoop request checks the processor's secondary cache to see if a valid copy of a particular cache line exists. If a valid copy exists, the processor returns the state of the cache line at the specified physical address in the secondary cache, and can modify the state of the cache line.

Intervention request requires the processor to return the state of the secondary cache line at the specified physical address. Under certain conditions related to the state of the cache line and the nature of the intervention request, the contents of the primary and secondary cache line can be returned. The state of the line can also be modified by this request.

Null request requires no action by the processor; it provides a mechanism for the external agent to either return control of the secondary cache to the processor, or return the System interface to the master state without affecting the processor.

Table 12-2 lists the external requests that each type of R4000 can receive (an X indicates the request is supported on that model).

Table 12-2 Supported External Requests

The processor controls the flow of external requests through the arbitration signals ExtRqst* and Release*, as shown in Figure 12-12. The external agent must acquire mastership of the System interface before it is allowed to issue an external request; the external agent arbitrates for mastership of the System interface by asserting ExtRqst* and then waiting for the processor to assert Release* for one cycle.



Figure 12-12 External Request

Mastership of the System interface always returns to the processor after an external request is issued. The processor does not accept a subsequent external request until it has completed the current request. The processor accepts external requests between the issue of a processor read request, or a processor read request followed by a potential update request and the issue of a processor write request within a cluster.

If there are no processor requests pending, the processor decides, based on its internal state, whether to accept the external request, or to issue a new processor request. The processor can issue a new processor request even if the external agent is requesting access to the System interface.

The external agent asserts ExtRqst* indicating that it wishes to begin an external request. The external agent then waits for the processor to signal that it is ready to accept this request by asserting Release*. The processor signals that it is ready to accept an external request based on the criteria listed below.

External Read Request

In contrast to a processor read request, data is returned directly in response to an external read request; no other requests can be issued until the processor returns the requested data. An external read request is complete after the processor returns the requested word of data.

The data identifier (see System Interface Commands and Data Identifiers in this chapter) associated with the response data can signal that the returned data is erroneous, causing the processor to take a bus error.


NOTE: The processor does not contain any resources that are readable by an external read request; in response to an external read request the processor returns undefined data and a data identifier with its Erroneous Data bit, SysCmd(5), set.


External Write Request

When an external agent issues a write request, the specified resource is accessed and the data is written to it. An external write request is complete after the word of data has been transmitted to the processor.

The only processor resource available to an external write request is the Interrupt register.

External Invalidate Request

When an external agent issues an invalidate request, the specified resource is accessed and the line is marked invalid. An external invalidate request is considered to be complete after the request has been transmitted.

External Update Request

When an external agent issues an update request, the specified resource is accessed and the line is replaced. An external update request is considered complete after the request has been transmitted.

External Snoop Request

An external snoop request makes the processor inspect the secondary cache to see if the cache contains a valid version of the specified cache line. If the valid cache line is present, the processor reports the cache line state and can modify this state.

An external snoop request is complete after the processor returns the state of the specified cache line.

External Intervention Request

When an external agent issues an intervention request, the specified secondary cache line is inspected. Upon inspection, the cache line state is reported and/or modified. Under certain circumstances the specified cache line may also be retrieved. The external intervention request is complete after one of the following occurs:

Read Response

A
read response returns data in response to a processor read request, as shown in Figure 12-13. While a read response is technically an external request, it has one characteristic that differentiates it from all other external requests--it does not perform System interface arbitration. For this reason, read responses are handled separately from all other external requests, and are simply called read responses.



Figure 12-13 Read Response



Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96

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