12.4 Processor and External Requests

Rules for Processor Requests

• After issuing a processor read request, either individually or as part of a cluster, the processor cannot issue a subsequent read request until it has received a read response.
• After issuing a processor update request, or after a potential update request becomes compulsory, the processor cannot issue a subsequent request until it has received an acknowledge for the update request.
• After the processor has issued a write request, the processor cannot issue a subsequent request until at least four cycles after the issue cycle of the write request. This means back-to-back write requests with a single data cycle are separated by two unused system cycles, as shown in Figure 12-6.

Figure 12-6 Back-to-Back Write Cycle Timing

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