11.3 R4000 Cache Description
Organization of the Primary Data Cache (D-Cache)
Each line of primary D-cache data has an associated 29-bit tag that contains a 24-bit physical address, 2-bit cache line state, a write-back bit, a parity bit for the physical address and cache state fields, and a parity bit for the write-back bit. Byte parity is used on D-cache data.
The R4000 processor primary D-cache has the following characteristics:
- write-back
- direct-mapped
- indexed with a virtual address
- checked with a physical tag
- organized with either a 4-word (16-byte) or 8-word (32-byte) cache line.
Figure 11-4 shows the format of a 8-word (32-byte) primary D-cache line.
Figure 11-4 R4000 8-Word Primary Data Cache Line Format
In all R4000 processors, the W (write-back) bit, not the cache state, indicates whether or not the primary cache contains modified data that must be written back to memory or to the secondary cache.
Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96
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