11.3 R4000 Cache Description
Organization of the Primary Instruction Cache (I-Cache)
Each line of primary I-cache data (although it is actually an instruction, it is referred to as data to distinguish it from its tag) has an associated 26-bit tag that contains a 24-bit physical address, a single valid bit, and a single parity bit. Byte parity is used on I-cache data.
The R4000 processor primary I-cache has the following characteristics:
- direct-mapped
- indexed with a virtual address
- checked with a physical tag
- organized with either a 4-word (16-byte) or 8-word (32-byte) cache line.
Figure 11-3 shows the format of an 8-word (32-byte) primary I-cache line.
Figure 11-3 R4000 8-Word Primary I-Cache Line Format
Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96
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