10.3 System Timing Parameters
Alignment to MasterClock
Certain processor inputs (specifically VCCOk, ColdReset*, and Reset*) are sampled based on MasterClock, while others (specifically, Status(7:0)) are output based on MasterClock. The same setup, hold, and drive-off parameters, tDS, tDH, tDM, and tDO, shown in Figures 10-3 and 10-4, apply to these inputs and outputs, but they are measured by MasterClock instead of SClock.
Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96
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