6. Floating-Point Unit
6.6 Floating-Point Instruction Set Overview
All FPU instructions are 32 bits long, aligned on a word boundary. They can be divided into the following groups:
- Load, Store, and Move instructions move data between memory, the main processor, and the FPU General Purpose registers.
- Conversion instructions perform conversion operations between the various data formats.
- Computational instructions perform arithmetic operations on floating-point values in the FPU registers.
- Compare instructions perform comparisons of the contents of registers and set a conditional bit based on the results.
- Branch on FPU Condition instructions perform a branch to the specified target if the specified coprocessor condition is met.
In the instruction formats shown in Tables 6-9 through 6-12, the fmt appended to the instruction opcode specifies the data format: S specifies single-precision binary floating-point, D specifies double-precision binary floating-point, W specifies 32-bit binary fixed-point, and L specifies 64-bit (long) binary fixed-point.
Table 6-9 FPU Instruction Summary: Load, Move and Store Instructions
Table 6-10 FPU Instruction Summary: Conversion Instructions
Table 6-11 FPU Instruction Summary: Computational Instructions
Table 6-12 FPU Instruction Summary: Compare and Branch Instructions
Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96
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