6.3 FPU Programming Model
These 64-bit registers hold floating-point values during floating-point operations and are physically formed from the General Purpose registers (FGRs). When the FR bit in the Status register equals 1, the FPR references a single 64-bit FGR.
The FPRs hold values in either single- or double-precision floating-point format. If the FR bit equals 0, only even numbers (the least register, as shown in Figure 6-2
) can be used to address FPRs. When the FR bit is set to a 1, all FPR register numbers are valid.If the FR bit equals 0 during a double-precision floating-point operation, the general registers are accessed in double pairs. Thus, in a double-precision operation, selecting Floating-Point Register 0 (FPR0) actually addresses adjacent Floating-Point General Purpose registers FGR0 and FGR1.
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