R4400 Microprocessor User's Manual
6. Floating-Point Unit
This chapter describes the MIPS floating-point unit (FPU) features, including the programming model, instruction set and formats, and the pipeline.
The FPU, with associated system software, fully conforms to the requirements of ANSI/IEEE Standard 754-1985, IEEE Standard for Binary Floating-Point Arithmetic. In addition, the MIPS architecture fully supports the recommendations of the standard and precise exceptions.
Chapter Contents
- 6.1 - Overview
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- 6.2 - FPU Features
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- 6.3 - FPU Programming Model
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- 6.4 - Floating-Point Formats
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- 6.5 - Binary Fixed-Point Format
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- 6.6 - Floating-Point Instruction Set Overview
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- 6.7 - FPU Instruction Pipeline Overview
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Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96
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