5.3 Processor Exceptions
Priority of Exceptions
The remainder of this chapter describes exceptions in the order of their priority shown in Table 5-13 with (certain of the exceptions, such as the TLB exceptions and Instruction/Data exceptions, grouped together for convenience). While more than one exception can occur for a single instruction, only the exception with the highest priority is reported.
Table 5-13 Exception Priority Order
Generally speaking, the exceptions described in the following sections are handled ("processed") by hardware; these exceptions are then serviced by software.
Copyright 1996, MIPS Technologies, Inc. -- 21 MAR 96
Generated with CERN WebMaker
